Name | Type | Posted | Actions |
|---|---|---|---|
RFI R2A 20260305.pdf | Mar 6, 2026 |
Rapid Assured Access (R2A)
Contact and place of performance
Nicholas S Roberts
ARBOGA, CA
USA
The Defense Microelectronics Activity (DMEA), McClellan, CA is issuing this Sources Sought Notice to find potential sources to provide rapid, long-term assured semiconductor foundry access. Industry responses to this Notice will assist the Government in determining the appropriate acquisition method, and will provide the Government information about the availability of qualified companies technically capable of meeti...
View moreThe purpose of the Rapid Assured Access (R2A) program is to provide rapid, long-term assured semiconductor foundry access, regardless of project size and classification, through enterprise-wide contracts executed by TAPO for DoW programs and defense contractors. TAPO will establish a R2A contract vehicle that provides rapid access to microelectronics manufacturers and an on-ramp of additional vendors, through that vehicle, as required to mitigate future technology gaps.
Objectives
Under R2A, and in alignment with the Department of War’s Acquisition Transformation Strategy, TAPO will prioritize three overarching outcomes:
1. Rapidly deploy technology and modernize systems cost-effectively to outpace our adversaries.
2. Increase production capacity and deliver wartime surge capacity for key capabilities, systems, weapons, and munitions to the U.S. Warfighter and priority allies and partners.
3. Secure our nation’s future by reinventing the semiconductor acquisition system to prioritize speed, execution, and agility to resolve current strategic challenges
R2A is an acquisition approach to meet the requirements of the DoW for rapid access to capabilities across the entire spectrum of wafer manufacturing and related services.
These capabilities include mask data prep functions, masks sourcing, wafer fabrication, and other ancillary aspects adjacent to wafer fabrication (e.g., packaging, assembly, test, etc.). The scope of R2A covers both prototype development and production.
A key objective of R2A is for the awardees to provide foundry access to Defense contractors (the Defense Industrial Base (DIB)) and program offices via this contract vehicle. The intent is for the awardees to leverage this vehicle as a means to rapidly provide TAPO clients with a quick-turn contract vehicle that has pre-negotiated terms and conditions. Negotiating a long-term contract with TAPO once saves the Government and the awardee time and effort by avoiding repeated negotiations over terms and conditions for each procurement. Forward wafer and other pricing shall be provided for clients who require use of the vehicle and can be refreshed at pre-determined junctures (1-2 years typically). The intent of R2A is to work directly with the wafer manufacturing foundry supporting fabless design suppliers. A wafer manufacturing foundry is a production qualified wafer fab that consists of Front End of Line (FEOL) and Back End of Line (BEOL) manufacturing steps commonly referred to as lithography, diffusion, chemical vapor deposition, etch, and other associated processes. DMEA/TAPO will not be the primary user of this vehicle but rather a service provider that administers the contract vehicle.
Specific Information being Sought:
Vendors having the ability to provide the requirements domestically in the United States are encouraged to submit a statement, not to exceed twenty (20) pages, documenting their capabilities and answering the questions below in a question/answer format, to include facilities requirements for the operation of the source, recent corporate experience in fulfilling this type of requirement, and:
a) Company name and address, to include email address(s) and URL(s),
b) Point of Contact (PoC) name,
c) PoC telephone number and email address,
d) Organizational Commercial and Government Entity (CAGE) code,
e) Organizational Unique Entity Identifier (UEI) number,
f) Business size status for the applicable North American Industry Classification System (NAICS) code,
g) Describes your organization’s business development approach (marketing strategy) for DoW work.
h) If you answered yes to question g, when was the last cost contract awarded to your organization? What was the contract number?
Specific information being sought:
Process Technologies
1. What production qualified and available technologies (current lithographic generation) are you offering for the commercial market or USG clients? For example: 32nm bulk Complimentary Metal-Oxide Semiconductor (CMOS) processes, 180nm Silicon-Germanium (SiGe,) and 1 micron Bi-CMOS, Silicon-on-Insulator (SOI) technologies, 7nm Fin-Fet. Feature size should be listed in nanometers (nm). Where applicable, fabrication plant capabilities shall be tooled to industry-standard silicon wafer sizes (200mm, 300mm).
2. Are your foundry and foundry ancillary functions, accredited for ISO 9001:2015? What other certifications/qualifications does your foundry possess?
3. What are the qualified operating temperature ranges for the aforementioned processes?
4. Where (vendor, country, state) do you produce or otherwise obtain photomasks that are production qualified for the technologies offered by your foundry?
5. If masks are not sourced domestically, is there an ability to source domestic masks?
6. For the technologies offered, are you able to offer robust Process Development Kits (PDK’s), standard cells, or other design IP?
7. For the design IP, how would you implement legal enablement (NDA’s), to allow PDK’s and other IP to be shared with design partners?
8. Provide domestic wafer shipment data by technology node (quantity of production qualified wafers shipped) year by year, going back 5 years.
Technology Ancillary Process Objectives (Foundry, Hardware, Development Services)
9. For the foundry technologies offered, can you perform or source: design or technology development, test, failure analysis, post processing, and packaging support services?
10. For the aforementioned technology ancillary process in questions 9, with the exception of design (Graphic Design System (GDS)), will you take ownership of yield, workmanship (process issues not associated with the functionality of the chip. GDS file) and sub-contractor issues (if outsourcing)?
Multi-Project Wafer Runs
11. For prototype development/test chips, using the technologies offered by your foundry, do you currently offer Multi-Project Wafer (MPW) or shuttle runs? Specific pricing is not requested, but what pricing methodology is employed? (for example, is it priced per square mm, is there a minimum space requirement)?
Production Management Data
12. How will you maintain a data management system for any information related to R2A and not formally submitted to the USG in a Contract Data Requirements List (CDRL) or otherwise required by future task orders? For example, how will schedule updates (such as Work in Progress (WIP)) and Wafer Acceptance Criteria (WAC) be communicated to TAPO?
Order Fulfillment Services
13. Does your company provide order fulfillment services (i.e. shipping)? If yes, please provide a summary of said services.
14. For the processes offered and services, what is the warranty period?
Technology Discontinuance /End of Life
15. The ability to produce required technologies in a timely and predictable manner is a requirement for R2A. Commercial end of life notices are not sufficient for USG needs. Do you have the ability to provide official notice of any intent to discontinue production with 12 months prior notice? This advance notice will allow all parties to account for end-of-life parts availability, place final purchase orders, make payment transactions, execute final production, assume deliveries, and close out any administrative functions.
Security and Export Regulation Controls
16. While not required, for the technologies offered, are you currently able to provide them (and ancillary support) with the following processing levels:
a. Trusted product flow, (up to SECRET classification), in a facility accredited by DMEA as a Trusted Supplier.
b. International Traffic in Arms Regulation (ITAR) applicable compliance.
Forecasting
17. The contractor’s ability to forecast potential contract vehicle utilization and provide DMEA with quarterly updates for planning purposes.
18. What is your expected utilization of this contract vehicle by number of contract actions and quantity of work (number of new engagements)?
Other comments
19. DMEA is interested in hearing industry comments on the potential structure of this IDIQ. Is there scope directly related to Foundry manufacturing that is not currently included in the RFI that needs to be addressed? Any other comments are welcome.
For additional information please see attachments.
The Defense Microelectronics Activity (DMEA) is issuing this sources sought notice to identify potential providers for the Rapid Assured Access (R2A) program. The objective of this initiative is to establish an enterprise-wide contract vehicle, managed by the Trust Accelerated Programs Office (TAPO), to provide the Department of War and defense contractors with rapid, long-term access to semiconductor foundry services. The program aims to modernize systems cost-effectively, increase production capacity for wartime surge requirements, and streamline the acquisition system for microelectronics. The anticipated contract vehicle will utilize pre-negotiated terms and conditions to facilitate quick-turn access to wafer manufacturing and ancillary services, including mask data preparation, wafer fabrication, packaging, assembly, and testing for both prototype development and production.
The scope of work involves domestic wafer manufacturing across various lithographic generations and technology nodes, such as 32nm bulk CMOS, 7nm Fin-FET, and 180nm SiGe. Awardees will be expected to work directly with manufacturing foundries to provide production-qualified wafers and support for fabless design suppliers. This includes the ability to provide Process Development Kits (PDKs), handle design IP through legal enablement, and manage technology ancillary processes such as failure analysis and post-processing. The government is also seeking information on vendors' capabilities regarding multi-project wafer runs, data management systems for work-in-progress tracking, and security compliance for Trusted product flows up to the Secret classification level.
This requirement is categorized under NAICS code 334413, Semiconductor and Related Device Manufacturing, and PSC R425, Support- Professional: Engineering/Technical. There is currently no set-aside designated for this notice. Responses are due by April 3, 2026, and should document corporate experience, technical capabilities, and domestic manufacturing capacity. The primary place of performance is Arboga, California, with administrative oversight provided by DMEA in McClellan, California. Detailed instructions and specific questions for industry response are included in the single attachment, RFI R2A 20260305.pdf, published under solicitation number HQ072726SNR01.
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